This invention relates to methods particularly adapted for manufacturing semiconductor devices and for the formation of an insulating layer having a planar surface and supplied with planar contacts in semiconductor devices.
In both bipolar and MOS semiconductor devices in order to provide an electrically conductive path to selected active regions, a patterned conductive layer overlying silicon dioxide insulating regions and silicon active regions formed in a silicon wafer, is provided. Such a patterned conductive layer is generally created by depositing a metal layer or a layer formed of another conductive material on the upper surface of the silicon wafer and removing undesired parts of the conductive layer.
Frequently, it is necessary to deposit additional conductive layers overlying this conductive layer in order to provide the required contacts. In order to do this it is necessary to first deposit an insulating layer on the upper surface of the patterned conductive layer.
Generally the profile of the top of this insulating layer reflects the profile of the patterned conductive layer. Since the surface of this insulating layer is therefore necessarily uneven it has generally been found difficult to provide a second conductive layer with a profile sufficiently planar to allow good continuous coverage by succeeding layers.
Additionally, in some devices active semiconductor regions along the upper surface of the silicon wafer are separated by thickened insulating field-oxide regions of silicon dioxide that are grown laterally around the silicon active regions. In many of these devices the profile of these field-oxide regions along the edges of the active regions are in the shape of a bird's head with the bird's head protruding upward along adjacent parts of the field-oxide regions and the silicon active regions.
The presence of this upwardly protruding bird's head in the underlying structure adds to the difficulty presented by the patterned conductive layer in the formation of succeeding layers.
Several methods have been disclosed for reducing the unevenness present in the upper surface of the underlying semiconductor by removing at least part of the bird's head.
One method of accomplishing this result is disclosed in Y. Hom-Ma et al, U.S. Pat. No. 4,025,411. In this method a photoresist layer, the upper surface of which is essentially planar, is formed on the bird's head and on the adjacent parts of the semiconductor structure. This structure is then subjected to a sputter etching process in which the photoresist and the silicon oxide are etched at about the same rate. As a result, the bird's head is removed without removing adjacent parts of the field-oxide isolation region.
The Hom-Ma et al patent also employs an ion milling technique to planarize an insulating layer formed on a patterned metal layer deposited on a flat surface. In this method a polymeric layer having an essentially planar upper surface is formed on the upper surface of the insulating layer. The polymeric layer is then ion milled to bring the planar surface downward until the metal is exposed. This technique however is not useful when the first metal layer overlies a bird's head and must be electrically separated from an overlying second metal layer.
Further this ion milling technique of the Hom-Ma et al patent is also not useful when it is desired to provide a semiconductor device with a generally planar insulating layer and to provide such a layer with generally planar contacts.